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Finance · 08/13/2025
Faraday UMC Partner on 22nm Lowpower DDR IP for Faster ASIC Design
Faraday Technology introduces a universal PHY IP supporting 3rd to 5th generation DDR/LPDDR, available on UMC's 22ULP and 14FFC FinFET processes. This solution aims to enhance ASIC customer development efficiency, reduce costs, and mitigate risks. Despite facing challenges, UMC's process advantages continue to support Faraday's IP solutions. The IP offers a streamlined path for customers seeking high-performance memory interfaces in their ASIC designs, leveraging the established manufacturing capabilities of UMC.